Publications

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A low-temperature upturn of the Coulomb drag resistivity {rho}{sub D} measured in undoped electron-hole bilayer devices, possibly manifesting from formation of a superfluid condensate or density modulated state, was recently observed. Here the effects of perpendicular and parallel magnetic fields on the drag upturn are examined. Measurements of {rho}{sub D} and drive layer resistivity {rho}{sub xx-e} as a function of temperature and magnetic field in two uEHBL devices are presented. In B{sub {perpendicular}}, the drag upturn was enhanced as the field increased up to roughly .2 T, beyond which oscillations in {rho}{sub D} and {rho}{sub xx-e}, reflecting Landau level formation, begin appearing. A small phase offset between those oscillations, which decreased at higher fields and temperatures, was also observed. In B{sub {parallel}}, the drag upturn magnitude diminished as the field increased. Above the upturn regime, both {rho}{sub D} and {rho}{sub xx-e} were enhanced by B{sub {parallel}}, the latter via decreased screening of the uniform background impurities.

Silicon is an ideal system for investigating single electron or isolated donor spins for quantum computation, due to long spin coherence times. Enhancement mode strained-silicon/silicon germanium (sSi/SiGe) devices would offer an as-yet untried path toward electron or electron/donor quantum dot systems. Thin, undoped SiGe dielectrics allow tight electrostatic confinement, as well as potential Lande g-factor engineered spin manipulation. In this talk we summarize recent progress toward sSi/SiGe enhancement mode devices on sSi on insulator, including characterization with X-ray diffraction and atomic force microscopy, as well as challenges faced and progress on integration of either top-down and bottom-up donor placement approaches in a sSi/SiGe enhancement mode structure.

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Novel single electron transistor (SET) read-out circuit designs are described. The circuits use a silicon SET interfaced to a CMOS voltage mode or current mode comparator to obtain a digital read-out of the state of the qubit. The design assumes standard submicron (0.35um) CMOS SOI technology using room temperature SPICE models. Implications and uncertainties related to the temperature scaling of these models to 100mK operation are discussed. Using this technology, the simulations predict a read-out operation speed of approximately 1ns and a power dissipation per cell as low as 2nW for single-shot read-out, which is a significant advantage over currently used radio frequency SET (RF-SET) approaches. © 2008 IEEE.

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There is significant interest in forming quantum bits (qubits) out of single electron devices for quantum information processing (QIP). Information can be encoded using properties like charge or spin. Spin is appealing because it is less strongly coupled to the solid-state environment so it is believed that the quantum state can better be preserved over longer times (i.e., that is longer decoherence times may be achieved). Long spin decoherence times would allow more complex qubit operations to be completed with higher accuracy. Recently spin qubits were demonstrated by several groups using electrostatically gated modulation doped GaAs double quantum dots (DQD) [1], which represented a significant breakthrough in the solid-state field. Although no Si spin qubit has been demonstrated to date, work on Si and SiGe based spin qubits is motivated by the observation that spin decoherence times can be significantly longer than in GaAs. Spin decoherence times in GaAs are in part limited by the random spectral diffusion of the non-zero nuclear spins of the Ga and As that couple to the electron spin through the hyperfine interaction. This effect can be greatly suppressed by using a semiconductor matrix with a near zero nuclear spin background. Near zero nuclear spin backgrounds can be engineered using Si by growing {sup 28}Si enriched epitaxy. In this talk, we will present fabrication details and electrical transport results of an accumulation mode double top gated Si metal insulator semiconductor (MIS) nanostructure, Fig 1 (a) & (b). We will describe how this single electron device structure represent a path towards forming a Si based spin qubit similar in design as that demonstrated in GaAs. Potential advantages of this novel qubit structure relative to previous approaches include the combination of: no doping (i.e., not modulation doped); variable two-dimensional electron gas (2DEG) density; CMOS compatible processes; and relatively small vertical length scales to achieve smaller dots. A primary concern in this structure is defects at the insulator-silicon interface. The Sandia National Laboratories 0.35 {micro}m fab line was used for critical processing steps including formation of the gate oxide to examine the utility of a standard CMOS quality oxide silicon interface for the purpose of fabricating Si qubits. Large area metal oxide silicon (MOS) structures showed a peak mobility of 15,000 cm{sup 2}/V-s at electron densities of {approx}1 x 10{sup 12} cm{sup -2} for an oxide thickness of 10 nm. Defect density measured using standard C-V techniques was found to be greater with decreasing oxide thickness suggesting a device design trade-off between oxide thickness and quantum dot size. The quantum dot structure is completed using electron beam lithography and poly-silicon etch to form the depletion gates, Fig 1 (a). The accumulation gate is added by introducing a second insulating Al{sub 2}O{sub 3} layer, deposited by atomic layer deposition, followed by an Al top gate deposition, Fig. 1 (b). Initial single electron transistor devices using SiO{sub 2} show significant disorder in structures with relatively large critical dimensions of the order of 200-300 nm, Fig 2. This is not uncommon for large silicon structures and has been cited in the literature [2]. Although smaller structures will likely minimize the effect of disorder and well controlled small Si SETs have been demonstrated [3], the design constraints presented by disorder combined with long term concerns about effects of defects on spin decoherence time (e.g., paramagnetic centers) motivates pursuit of a 2nd generation structure that uses a compound semiconductor approach, an epitaxial SiGe barrier as shown in Fig. 2 (c). SiGe may be used as an electron barrier when combined with tensilely strained Si. The introduction of strained-Si into the double top gated device structure, however, represents additional fabrication challenges. Thermal budget is potentially constrained due to concerns related to strain relaxation. Fabrication details related to the introduction of strained silicon on insulator and SiGe barrier formation into the Sandia National Laboratories 0.35 {micro}m fab line will also be presented.

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We describe the development of a novel silicon quantum bit (qubit) device architecture that involves using materials that are compatible with a Sandia National Laboratories (SNL) 0.35 mum complementary metal oxide semiconductor (CMOS) process intended to operate at 100 mK. We describe how the qubit structure can be integrated with CMOS electronics, which is believed to have advantages for critical functions like fast single electron electrometry for readout compared to current approaches using radio frequency techniques. Critical materials properties are reviewed and preliminary characterization of the SNL CMOS devices at 4.2 K is presented.

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For several years now quantum computing has been viewed as a new paradigm for certain computing applications. Of particular importance to this burgeoning field is the development of an algorithm for factoring large numbers which obviously has deep implications for cryptography and national security. Implementation of these theoretical ideas faces extraordinary challenges in preparing and manipulating quantum states. The quantum transport group at Sandia has demonstrated world-leading, unique double quantum wires devices where we have unprecedented control over the coupling strength, number of 1 D channels, overlap and interaction strength in this nanoelectronic system. In this project, we study 1D-1D tunneling with the ultimate aim of preparing and detecting quantum states of the coupled wires. In a region of strong tunneling, electrons can coherently oscillate from one wire to the other. By controlling the velocity of the electrons, length of the coupling region and tunneling strength we will attempt to observe tunneling oscillations. This first step is critical for further development double quantum wires into the basic building block for a quantum computer, and indeed for other coupled nanoelectronic devices that will rely on coherent transport. If successful, this project will have important implications for nanoelectronics, quantum computing and information technology.

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Macroscopic quantum states such as superconductors, Bose-Einstein condensates and superfluids are some of the most unusual states in nature. In this project, we proposed to design a semiconductor system with a 2D layer of electrons separated from a 2D layer of holes by a narrow (but high) barrier. Under certain conditions, the electrons would pair with the nearby holes and form excitons. At low temperature, these excitons could condense to a macroscopic quantum state either through a Bose-Einstein condensation (for weak exciton interactions) or a BCS transition to a superconductor (for strong exciton interactions). While the theoretical predictions have been around since the 1960's, experimental realization of electron-hole bilayer systems has been extremely difficult due to technical challenges. We identified four characteristics that if successfully incorporated into a device would give the best chances for excitonic condensation to be observed. These characteristics are closely spaced layers, low disorder, low density, and independent contacts to allow transport measurements. We demonstrated each of these characteristics separately, and then incorporated all of them into a single electron-hole bilayer device. The key to the sample design is using undoped GaAs/AlGaAs heterostructures processed in a field-effect transistor geometry. In such samples, the density of single 2D layers of electrons could be varied from an extremely low value of 2 x 10{sup 9} cm{sup -2} to high values of 3 x 10{sup 11} cm{sup -2}. The extreme low values of density that we achieved in single layer 2D electrons allowed us to make important contributions to the problem of the metal insulator transition in two dimensions, while at the same time provided a critical base for understanding low density 2D systems to be used in the electron-hole bilayer experiments. In this report, we describe the processing advances to fabricate single and double layer undoped samples, the low density results on single layers, and evidence for gateable undoped bilayers.

We report low-dimensional tunneling in an independently contacted vertically coupled quantum wire system. This nanostructure is fabricated in a high quality GaAs/AlGaAs parallel double quantum well heterostructure. Using a unique flip chip technique to align top and bottom split gates to form low-dimensional constrictions in each of the independently contacted quantum wells we explicitly control the subband occupation of the individual wires. In addition to the expected two-dimensional (2D)-2D tunneling results, we have found additional tunneling features that are related to the one-dimensional quantum wires.

We demonstrate the presence of a resonant interaction between a pair of coupled quantum wires, which are formed in the ultrahigh mobility two-dimensional electron gas of a GaAs/AlGaAs quantum well. The coupled-wire system is realized by an extension of the split-gate technique, in which bias voltages are applied to Schottky gates on the semiconductor surface, to vary the width of the two quantum wires, as well as the strength of the coupling between them. The key observation of interest here is one in which the gate voltages used to define one of the wires are first fixed, after which the conductance of this wire is measured as the gate voltage used to form the other wire is swept. Over the range of gate voltage where the swept wire pinches off, we observe a resonant peak in the conductance of the fixed wire that is correlated precisely to this pinchoff condition. In this paper, we present new results on the current- and temperature-dependence of this conductance resonance, which we suggest is related to the formation of a local moment in the swept wire as its conductance is reduced below 2e2/h.

We demonstrate the presence of a resonant interaction between a pair of coupled quantum wires, which are realized in the ultra-high mobility two-dimensional electron gas of a GaAs/AlGaAs quantum well. Measuring the conductance of one wire, as the width of the other is varied, we observe a resonant peak in its conductance that is correlated with the point at which the swept wire pinches off. We discuss this behavior in terms of recent theoretical predictions concerning local spin-moment formation in quantum wires.

Transport measurements of high-mobility two-dimensional electron systems at low temperatures have revealed a large resistance anisotropy around half-filling of excited Landau levels. These results have been attributed to electronic stripe-phase formation with spontaneously broken orientational symmetry. Mechanisms which are known to break the orientational symmetry include poorly-understood crystal structure effects and an in-plane magnetic field, B{sub {parallel}}. Here we report that a large B{sub {parallel}} also causes the transport anisotropy to persist up to much higher temperatures. In this regime, we find that the anisotropic resistance scales sublinearly with B{sub {parallel}}/T. These observations support the proposal that the transition from anisotropic to isotropic transport reflects a liquid crystal phase transition where local stripe order persists even in the isotropic regime.

The metallic conductivity of dilute two-dimensional holes in a GaAs HIGFET (Heterojunction Insulated-Gate Field-Effect Transistor) with extremely high mobility and large r{sub s} is found to have a linear dependence on temperature, consistent with the theory of interaction corrections in the ballistic regime. Phonon scattering contributions are negligible in the temperature range of our interest, allowing comparison between our measured data and theory without any phonon subtraction. The magnitude of the Fermi liquid interaction parameter F{sub 0}{sup {sigma}} determined from the experiment, however, decreases with increasing r{sub s} for r{sub s} {approx}> 22, a behavior unexpected from existing theoretical calculations valid for small r{sub s}.

Coupled double quantum well field-effect transistors with a grating gate exhibit a terahertz ({approx}600 GHz) photoconductive response that resonates with standing two dimensional plasma oscillations under the gate and may be the basis for developing a fast, tunable terahertz detector. The application of a precisely aligned in-plane magnetic field produces no detectable change in the device DC conductance but produces a dramatic inversion, growth of the terahertz photoconductive response and frequency shift of the standing plasmon resonances. The frequency shift can be described by a significant mass increase produced by the in-plane field. The mass increase is substantially larger than that calculated from a single well and we presume that a proper treatment of the coupled double quantum well may resolve this discrepancy.

The goal of this LDRD was to engineer further improvements in a novel electron tunneling device, the double electron layer tunneling transistor (DELTT). The DELTT is a three terminal quantum device, which does not require lateral depletion or lateral confinement, but rather is entirely planar in configuration. The DELTT's operation is based on 2D-2D tunneling between two parallel 2D electron layers in a semiconductor double quantum well heterostructure. The only critical dimensions reside in the growth direction, thus taking full advantage of the single atomic layer resolution of existing semiconductor growth techniques such as molecular beam epitaxy. Despite these advances, the original DELTT design suffered from a number of performance short comings that would need to be overcome for practical applications. These included (i)a peak voltage too low ({approx}20 mV) to interface with conventional electronics and to be robust against environmental noise, (ii) a low peak current density, (iii) a relatively weak dependence of the peak voltage on applied gate voltage, and (iv) an operating temperature that, while fairly high, remained below room temperature. In this LDRD we designed and demonstrated an advanced resonant tunneling transistor that incorporates structural elements both of the DELTT and of conventional double barrier resonant tunneling diodes (RTDs). Specifically, the device is similar to the DELTT in that it is based on 2D-2D tunneling and is controlled by a surface gate, yet is also similar to the RTD in that it has a double barrier structure and a third collector region. Indeed, the device may be thought of either as an RTD with a gate-controlled, fully 2D emitter, or alternatively, as a ''3-layer DELTT,'' the name we have chosen for the device. This new resonant tunneling transistor retains the original DELTT advantages of a planar geometry and sharp 2D-2D tunneling characteristics, yet also overcomes the performance shortcomings of the original DELTT design. In particular, it exhibits the high peak voltages and current densities associated with conventional RTDs, allows sensitive control of the peak voltage by the control gate, and operates nearly at room temperature. Finally, we note under this LDRD we also investigated the use of three layer DELTT structures as long wavelength (Terahertz) detectors using photon-assisted tunneling. We have recently observed a narrowband (resonant) tunable photoresponse in related structures consisting of grating-gated double quantum wells, and report on that work here as well.