Multi-Layered Solid State Neutron Sensor
Abstract not provided.
Publications
Sub-10um Pitch Hybrid Direct Bond Interconnect Development for Die-to-Die Hybridization
Abstract not provided.
Sub-10μm pitch hybrid direct bond interconnect development for die-to-die hybridization
Proceedings - Electronic Components and Technology Conference
Direct bond interconnect (DBI) processes enable chip to chip, low resistivity electrical connections for 2.5-D scaling of electrical circuits and heterogenous integration. This work describes SiO2/Cu DBI technology with Cu interconnect performance investigated over a range of inter-die Cu gap heights and post-bond annealing temperatures. Chemical mechanical polishing (CMP) generates wafers with a controlled Cu recess relative to the SiO2 surface, yielding die pairs with inter-die Cu gap heights ranging between 9 and 47 nm. Bonded die with different gap heights show similar per-connection resistance after annealing at 400 degrees Celsius but annealing at lower temperatures between 250 and 350 degrees Celsius results in failing or high-resistance interconnects with intermediate gaps showing lowest resistance. Cross-section scanning electron microscope (SEM) image analysis shows that the microstructure is largely independent of post-bond annealing temperature, suggesting that the temperature behavior is due to nanoscale scale interfacial effects not observable by SEM. The bond strength is affirmed by successful step-wise mechanical and chemical removal of the handle silicon layer to reveal metal from both die. This work demonstrates a 2.5-D integration method using a 3 micron Cu DBI process on a 7.5 micron pitch with electrical contacts ranging between 3.8 and 4.8 Ohms per contact plug.
Electroplating Techniques and Applications
Abstract not provided.
Die Level Microbumping and Flip Chip Bonding for MPW Die
Abstract not provided.
Batch Level Electroless Under Bump Metallization for Singulated Semiconductor Die
Abstract not provided.
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