The defect detection capabilities of Power Spectrum Analysis (PSA) [1] have been successfully combined with local laser heating to isolate defective circuitry in a high-speed Si Phase Locked Loop (PLL). The defective operation resulted in missed counts when operating at multi-GHz speeds and elevated temperatures. By monitoring PSA signals at a specific frequency through zero-spanning and scanning the suspect device with a heating laser (1340 nm wavelength), the area(s) causing failure were localized. PSA circumvents the need for a rapid pass/fail detector like that used for Soft Defect Localization (SDL) [2] or Laser-Assisted Defect Analysis (LADA) [3] and converts the at-speed failure to a DC signature. The experimental setup for image acquisition and examples demonstrating utility are described.
Here, we present a low resistance, straightforward planar ohmic contact for Al0.45Ga0.55N/Al0.3Ga0.7N high electron mobility transistors. Five metal stacks (a/Al/b/Au; a = Ti, Zr, V, Nb/Ti; b = Ni, Mo, V) were evaluated at three individual annealing temperatures (850, 900, and 950°C). The Ti/Al/Ni/Au achieved the lowest specific contact resistance at a 900°C anneal temperature. Transmission electron microscopy analysis revealed a metal-semiconductor interface of Ti-Al-Au for an ohmic (900°C anneal) and a Schottky (850°C anneal) Ti/Al/Ni/Au stack. HEMTs were fabricated using the optimized recipe with resulting contacts that had room-temperature specific contact resistances of ρc = 2.5 × 10-5 Ω cm², sheet resistances of RSH = 3.9 kΩ/$\blacksquare$, and maximum current densities of 75 mA/mm (at VGATE of 2 V). Electrical measurements from -50 to 200°C had decreasing specific contact resistance and increasing sheet resistance, with increasing temperature. These contacts enabled state-of-the-art performance of Al0.45Ga0.55N/Al0.3Ga0.7N HEMTs.
This work outlines a case study of charge-induced damage to SOI wafers that caused gate leakage in discrete transistors and static leakage in packaged integrated circuits (ICs). The consequential yield fallout occurred primarily at wafer center. Electrical, optical, and laser-based failure analysis techniques were used to characterize the damage and determine root cause of electrical failure. The failure mechanism was localized to a rinse step during chemical mechanical planarization (CMP). Furthermore, both current-voltage (IV) sweeps and characteristic spatial patterns generated by thermally-induced voltage alteration (TIVA) were used to capture the trends on both packaged ICs and SOI wafers for this type of charge-induced damage; this.led to quick identification of another source of charge-induced damage that affected the post-fab yield.
Laser-based failure analysis techniques demonstrate the ability to quickly and non-intrusively screen deep ultraviolet light-emitting diodes (LEDs) for electrically-active defects. In particular, two laser-based techniques, light-induced voltage alteration and thermally-induced voltage alteration, generate applied voltage maps (AVMs) that provide information on electrically-active defect behavior including turn-on bias, density, and spatial location. Here, multiple commercial LEDs were examined and found to have dark defect signals in the AVM indicating a site of reduced resistance or leakage through the diode. The existence of the dark defect signals in the AVM correlates strongly with an increased forward-bias leakage current. This increased leakage is not present in devices without AVM signals. Transmission electron microscopy analysis of a dark defect signal site revealed a dislocation cluster through the pn junction. The cluster included an open core dislocation. Even though LEDs with few dark AVM defect signals did not correlate strongly with power loss, direct association between increased open core dislocation densities and reduced LED device performance has been presented elsewhere [M. W. Moseley et al., J. Appl. Phys. 117, 095301 (2015)].
Visible light laser voltage probing (LVP) for improved backside optical spatial resolution is demonstrated on ultra-thinned samples. A prototype system for data acquisition, a method to produce ultra-thinned SOI samples, and LVP signal, imaging, and waveform acquisition are described on early and advanced SOI technology nodes. Spatial resolution and signal comparison with conventional, infrared LVP analysis is discussed.