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Charge Sensed Pauli Blockade in a Metal–Oxide–Semiconductor Lateral Double Quantum Dot

Nano Letters

Nguyen, Khoi T.; Lu, Tzu-Ming L.; Muller, Richard P.; Carroll, Malcolm; Lilly, Michael L.; Nielsen, Erik N.; Bishop, Nathaniel B.; Young, Ralph W.; Wendt, J.R.; Dominguez, Jason J.; Pluym, Tammy P.; Stevens, Jeffrey S.

We report Pauli blockade in a multielectron silicon metal–oxide–semiconductor double quantum dot with an integrated charge sensor. The current is rectified up to a blockade energy of 0.18 ± 0.03 meV. The blockade energy is analogous to singlet–triplet splitting in a two electron double quantum dot. Built-in imbalances of tunnel rates in the MOS DQD obfuscate some edges of the bias triangles. A method to extract the bias triangles is described, and a numeric rate-equation simulation is used to understand the effect of tunneling imbalances and finite temperature on charge stability (honeycomb) diagram, in particular the identification of missing and shifting edges. A bound on relaxation time of the triplet-like state is also obtained from this measurement.

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Enhancement-mode buried strained silicon channel double quantum dot with integrated electrometer

ECS Transactions

Lu, T.M.; Bishop, N.; Pluym, T.; Kotula, P.; Lilly, M.; Carroll, Malcolm

We proposed and demonstrated an enhancement-mode SiGe/strained-Si stack for a quantum dot [1], which both spaces the quantum dot away from interface defects and removes dopants. Smooth and predictable potentials for single electron quantum dots are highly desirable for beyond Moore's law approaches like quantum annealing and quantum computing. Enhancement-mode SiGe/sSi field-effect transistors (FETs) have been demonstrated previously [2,3] and have recently achieved mobilities as high as 1.6x106 cm2/V s [4], indicating that a smooth potential approaching other model systems like GaAs can be produced in Si. This material stack has subsequently been used successfully by a different group to produce coherent qubit spin rotations [5]. We report in this letter that low-disorder quantum dots can be formed using a double-top-gated lateral quantum dot nanostructure, defined using 180 nm line width platform and fabricated in a 150 mm wafer batch-processing tool set in the Sandia National Labs silicon foundry. This is an important step towards showing that defects, lithography and process tolerances in a Si foundry are sufficient to build low disorder double quantum dots for both quantum computing and quantum annealing. © The Electrochemical Society.

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Results 151–200 of 316
Results 151–200 of 316