Publications

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The silicon microelectronics industry is the technological driver of modern society. The whole industry is built upon one major invention--the solid-state transistor. It has become clear that the conventional transistor technology is approaching its limitations. Recent years have seen the advent of magnetoelectronics and spintronics with combined magnetism and solid state electronics via spin-dependent transport process. In these novel devices, both charge and spin degree freedoms can be manipulated by external means. This leads to novel electronic functionalities that will greatly enhance the speed of information processing and memory storage density. The challenge lying ahead is to understand the new device physics, and control magnetic phenomena at nanometer length scales and in reduced dimensions. To meet this goal, we proposed the silicon nanocrystal system, because: (1) It is compatible with existing silicon fabrication technologies; (2) It has shown strong quantum confinement effects, which can modify the electric and optical properties through directly modifying the band structure; and (3) the spin-orbital coupling in silicon is very small, and for isotopic pure {sup 28}Si, the nuclear spin is zero. These will help to reduce the spin-decoherence channels. In the past fiscal year, we have studied the growth mechanism of silicon-nanocrystals embedded in silicon dioxide, their photoluminescence properties, and the Si-nanocrystal's magnetic properties in the presence of Mn-ion doping. Our results may demonstrate the first evidence of possible ferromagnetic orders in Mn-ion implanted silicon nanocrystals, which can lead to ultra-fast information process and ultra-dense magnetic memory applications.

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Demand for integration of optoelectronic functionality (e.g., optical interconnects) with silicon complementary metal oxide semiconductor (CMOS) technology has for many years motivated the investigation of low temperature (∼450°C) germanium deposition processes that may be integrated in to the back-end CMOS process flow. A common challenge to improving the germanium quality is the thermal budget of the in-situ bake, which is used to reduce defect forming oxygen and carbon surface residues [1, 2]. Typical cleaning temperatures to remove significant concentrations of oxygen and carbon have been reported to be approximately 750°C for thermal hydrogen bakes in standard chemical vapor deposition chambers [3]. Germanium device performance using lower peak in-situ cleans (i.e., ∼450°C) has been hampered by additional crystal defectivity, although epitaxy is possible with out complete removal of oxygen and carbon at lower temperatures [4]. Plasma enhanced chemical vapor deposition (PECVD) is used to reduce the processing temperature. Hydrogen plasma assisted in-situ surface preparation of epitaxy has been shown to reduce both carbon and oxygen concentrations and enable epitaxial growth at temperatures as low as ∼150°C [5,6]. The hydrogen is believed to help produce volatile Si-O and H2O species in the removal of oxygen, although typically this is not reported to occur rapidly enough to completely clear the surface of all oxygen until ∼550°C. In this paper, we describe the use of an in-situ argon/germane high density plasma to help initiate germanium epitaxy on silicon using a peak temperature of approximately 460°C, Germanium is believed to readily break Si-O bonds to form more volatile Ge-O [7-9], therefore, argon/germane plasmas offer the potential to reduce the necessary in-situ clean temperature while obtaining similar results as hydrogen in-situ cleans. To the authors knowledge this report is also the first demonstration of germanium epitaxy on silicon using this commercially available high density plasma chamber configuration instead of, for example, remote or electron cyclotron resonance configurations. © 2006 Materials Research Society.