While Xyce uses the Autoconf and Automake system to configure builds, it is often necessary to perform more than the customary %E2%80%9C./configure%E2%80%9D builds many open source users have come to expect. This document describes the steps needed to get Xyce built on a number of common platforms.
This manual describes the use of the Xyce Parallel Electronic Simulator. Xyce has been designed as a SPICE-compatible, high-performance analog circuit simulator, and has been written to support the simulation needs of the Sandia National Laboratories electrical designers. This development has focused on improving capability over the current state-of-the-art in the following areas: Capability to solve extremely large circuit problems by supporting large-scale parallel computing platforms (up to thousands of processors). This includes support for most popular parallel and serial computers. A differential-algebraic-equation (DAE) formulation, which better isolates the device model package from solver algorithms. This allows one to develop new types of analysis without requiring the implementation of analysis-specific device models. Device models that are specifically tailored to meet Sandias needs, including some radiationaware devices (for Sandia users only). Object-oriented code design and implementation using modern coding practices. Xyce is a parallel code in the most general sense of the phrase a message passing parallel implementation which allows it to run efficiently a wide range of computing platforms. These include serial, shared-memory and distributed-memory parallel platforms. Attention has been paid to the specific nature of circuit-simulation problems to ensure that optimal parallel efficiency is achieved as the number of processors grows.
This document is a reference guide to the Xyce Parallel Electronic Simulator, and is a companion document to the Xyce Users Guide [1] . The focus of this document is (to the extent possible) exhaustively list device parameters, solver options, parser options, and other usage details of Xyce. This document is not intended to be a tutorial. Users who are new to circuit simulation are better served by the Xyce Users Guide [1] .
Photocurrent generated by ionizing radiation represents a threat to microelectronics in radiation environments. Circuit simulation tools such as SPICE [1] can be used to analyze these threats, and typically rely on compact models for individual electrical components such as transistors and diodes. Compact models consist of a handful of differential and/or algebraic equations, and are derived by making simplifying assumptions to any of the many semiconductor transport equations. Historically, many photocurrent compact models have suffered from accuracy issues due to the use of qualitative approximation, rather than mathematically correct solutions to the ambipolar diffusion equation. A practical consequence of this inaccuracy is that a given model calibration is trustworthy over only a narrow range of operating conditions. This report describes work to produce improved compact models for photocurrent. Specifically, an analytic model is developed for epitaxial diode structures that have a highly doped subcollector. The analytic model is compared with both numerical TCAD calculations, as well as the compact model described in reference [2]. The new analytic model compares well against TCAD over a wide range of operating conditions, and is shown to be superior to the compact model from reference [2].
We have developed a system to measure the directional thermal emission from a surface, and in turn, calculate its emissivity. This approach avoids inaccuracies sometimes encountered with the traditional method for calculating emissivity, which relies upon subtracting the measured total reflectivity and total transmissivity from unity. Typical total reflectivity measurements suffer from an inability to detect backscattered light, and may not be accurate for high angles of incidence. Our design allows us to vary the measurement angle (θ) from near-normal to ∼80°, and can accommodate samples as small as 7 mm on a side by controlling the sample interrogation area. The sample mount is open-backed to eliminate shine-through, can be heated up to 200°C, and is kept under vacuum to avoid oxidizing the sample. A cold shield reduces the background noise and stray signals reflected off the sample. We describe the strengths, weaknesses, trade-offs, and limitations of our system design, data analysis methods, the measurement process, and present the results of our validation of this Variable-Angle Directional Emissometer.
The LIGA microfabrication technique offers a unique method for fabricating 3-dimensional photonic lattices based on the Iowa State "logpile" structure. These structures represent the [111] orientation of the [100] logpile structures previously demonstrated by Sandia National Laboratories, The novelty to this approach is the single step process that does not require any alignment. The mask and substrate are fixed to one another and exposed twice from different angles using a synchrotron light source. The first exposure patterns the resist at an angle of 45 degrees normal to the substrate with a rotation of 8 degrees. The second exposure requires a 180 degree rotation about the normal of the mask and substrate. The resulting pattern is a vertically oriented logpile pattern that is rotated slightly off axis. The exposed PMMA is developed in a single step to produce an inverse lattice structure. This mold is filled with electroplated gold and stripped away to create a usable gold photonic crystal. Tilted logpiles demonstrate band characteristics very similar to those observed from [100] logpiles. Reflectivity tests show a band edge around 5 μm and compare well with numerical simulations.
The silicon microelectronics industry is the technological driver of modern society. The whole industry is built upon one major invention--the solid-state transistor. It has become clear that the conventional transistor technology is approaching its limitations. Recent years have seen the advent of magnetoelectronics and spintronics with combined magnetism and solid state electronics via spin-dependent transport process. In these novel devices, both charge and spin degree freedoms can be manipulated by external means. This leads to novel electronic functionalities that will greatly enhance the speed of information processing and memory storage density. The challenge lying ahead is to understand the new device physics, and control magnetic phenomena at nanometer length scales and in reduced dimensions. To meet this goal, we proposed the silicon nanocrystal system, because: (1) It is compatible with existing silicon fabrication technologies; (2) It has shown strong quantum confinement effects, which can modify the electric and optical properties through directly modifying the band structure; and (3) the spin-orbital coupling in silicon is very small, and for isotopic pure {sup 28}Si, the nuclear spin is zero. These will help to reduce the spin-decoherence channels. In the past fiscal year, we have studied the growth mechanism of silicon-nanocrystals embedded in silicon dioxide, their photoluminescence properties, and the Si-nanocrystal's magnetic properties in the presence of Mn-ion doping. Our results may demonstrate the first evidence of possible ferromagnetic orders in Mn-ion implanted silicon nanocrystals, which can lead to ultra-fast information process and ultra-dense magnetic memory applications.
The potential for electrochromic (EC) materials to be incorporated into a Fabry-Perot (FP) filter to allow modest amounts of tuning was evaluated by both experimental methods and modeling. A combination of chemical vapor deposition (CVD), physical vapor deposition (PVD), and electrochemical methods was used to produce an ECFP film stack consisting of an EC WO{sub 3}/Ta{sub 2}O{sub 5}/NiO{sub x}H{sub y} film stack (with indium-tin-oxide electrodes) sandwiched between two Si{sub 3}N{sub 4}/SiO{sub 2} dielectric reflector stacks. A process to produce a NiO{sub x}H{sub y} charge storage layer that freed the EC stack from dependence on atmospheric humidity and allowed construction of this complex EC-FP stack was developed. The refractive index (n) and extinction coefficient (k) for each layer in the EC-FP film stack was measured between 300 and 1700 nm. A prototype EC-FP filter was produced that had a transmission at 500 nm of 36%, and a FWHM of 10 nm. A general modeling approach that takes into account the desired pass band location, pass band width, required transmission and EC optical constants in order to estimate the maximum tuning from an EC-FP filter was developed. Modeling shows that minor thickness changes in the prototype stack developed in this project should yield a filter with a transmission at 600 nm of 33% and a FWHM of 9.6 nm, which could be tuned to 598 nm with a FWHM of 12.1 nm and a transmission of 16%. Additional modeling shows that if the EC WO{sub 3} absorption centers were optimized, then a shift from 600 nm to 598 nm could be made with a FWHM of 11.3 nm and a transmission of 20%. If (at 600 nm) the FWHM is decreased to 1 nm and transmission maintained at a reasonable level (e.g. 30%), only fractions of a nm of tuning would be possible with the film stack considered in this study. These tradeoffs may improve at other wavelengths or with EC materials different than those considered here. Finally, based on our limited investigation and material set, the severe absorption associated with the refractive index change suggests that incorporating EC materials into phase correcting spatial light modulators (SLMS) would allow for only negligible phase correction before transmission losses became too severe. However, we would like to emphasize that other EC materials may allow sufficient phase correction with limited absorption, which could make this approach attractive.