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SOI-Enabled MEMS Processes Lead to Novel Mechanical Optical and Atomic Physics Devices

Herrera, Gilbert V.; McCormick, Frederick B.; Nielson, Gregory N.; Nordquist, Christopher N.; Okandan, Murat O.; Olsson, Roy H.; Ortiz, Keith O.; Platzbecker, Mark R.; Resnick, Paul J.; Shul, Randy J.; Bauer, Todd B.; Sullivan, Charles T.; Watts, Michael W.; Blain, Matthew G.; Dodd, Paul E.; Dondero, Richard D.; Garcia, Ernest J.; Galambos, Paul; Hetherington, Dale L.; Hudgens, James J.

Abstract not provided.

Integrated optical MEMS using through-wafer vias and bump-bonding

McCormick, Frederick B.; Frederick, Scott K.

This LDRD began as a three year program to integrate through-wafer vias, micro-mirrors and control electronics with high-voltage capability to yield a 64 by 64 array of individually controllable micro-mirrors on 125 or 250 micron pitch with piston, tip and tilt movement. The effort was a mix of R&D and application. Care was taken to create SUMMiT{trademark} (Sandia's ultraplanar, multilevel MEMS technology) compatible via and mirror processes, and the ultimate goal was to mate this MEMS fabrication product to a complementary metal-oxide semiconductor (CMOS) electronics substrate. Significant progress was made on the via and mirror fabrication and design, the attach process development as well as the electronics high voltage (30 volt) and control designs. After approximately 22 months, the program was ready to proceed with fabrication and integration of the electronics, final mirror array, and through wafer vias to create a high resolution OMEMS array with individual mirror electronic control. At this point, however, mission alignment and budget constraints reduced the last year program funding and redirected the program to help support the through-silicon via work in the Hyper-Temporal Sensors (HTS) Grand Challenge (GC) LDRD. Several months of investigation and discussion with the HTS team resulted in a revised plan for the remaining 10 months of the program. We planned to build a capability in finer-pitched via fabrication on thinned substrates along with metallization schemes and bonding techniques for very large arrays of high density interconnects (up to 2000 x 2000 vias). Through this program, Sandia was able to build capability in several different conductive through wafer via processes using internal and external resources, MEMS mirror design and fabrication, various bonding techniques for arrayed substrates, and arrayed electronics control design with high voltage capability.

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Tilted logpile photonic crystals using the LIGA technique

Proceedings of SPIE - The International Society for Optical Engineering

Williams, John D.; Arrington, C.; Sweatt, W.C.; Peters, D.W.; El-Kady, I.; Ellis, A.R.; Verley, Jason V.; McCormick, Frederick B.

The LIGA microfabrication technique offers a unique method for fabricating 3-dimensional photonic lattices based on the Iowa State "logpile" structure. These structures represent the [111] orientation of the [100] logpile structures previously demonstrated by Sandia National Laboratories, The novelty to this approach is the single step process that does not require any alignment. The mask and substrate are fixed to one another and exposed twice from different angles using a synchrotron light source. The first exposure patterns the resist at an angle of 45 degrees normal to the substrate with a rotation of 8 degrees. The second exposure requires a 180 degree rotation about the normal of the mask and substrate. The resulting pattern is a vertically oriented logpile pattern that is rotated slightly off axis. The exposed PMMA is developed in a single step to produce an inverse lattice structure. This mold is filled with electroplated gold and stripped away to create a usable gold photonic crystal. Tilted logpiles demonstrate band characteristics very similar to those observed from [100] logpiles. Reflectivity tests show a band edge around 5 μm and compare well with numerical simulations.

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Results 26–45 of 45
Results 26–45 of 45