Publications

9 Results
Skip to search filters

Near-Zero Power Mechanical Shock-Resistant Inertial Wakeup System with Scaled Inputs

INERTIAL 2020 - 7th IEEE International Symposium on Inertial Sensors and Systems, Proceedings

Yen, Sean Y.; Griffin, Benjamin A.; Barney, Bryson; Edstrand, Adam E.; Young, Andrew I.; Pluym, Tammy; Donahue, Emily D.; Reger, Robert W.

This paper reports on a near-zero power inertial wakeup sensor system supporting digital weighting of inputs and with protection against false positives due to mechanical shocks. This improves upon existing work by combining the selectivity and sensitivity (Q-amplification) of resonant MEMS sensors with the flexibility of digital signal processing while consuming below 10 nW. The target application is unattended sensors for perimeter sensing and machinery health monitoring where extended battery life afforded by the low power consumption eliminates the need for power cables. For machinery health monitoring, the signals of interest are stationary but may contain spurious mechanical shocks.

More Details

A Novel Triple Inverter Design for CMOS Clocks and Oscillators

IFCS/EFTF 2019 - Joint Conference of the IEEE International Frequency Control Symposium and European Frequency and Time Forum, Proceedings

Wessendorf, Kurt O.; Yen, Sean Y.

Single inverter gate CMOS oscillator designs have been used for decades based on the CMOS technology of the time. While a single inverter gate can deliver very good performance dependent on the application, it presents design limitations due to parameter trade-offs of transconductance, output impedance, and bias current. This paper introduces a novel CMOS sustaining amplifier design that significantly increases the design flexibility beyond what a single inverter can provide. It uses a three-stage inverter with the center inverter incorporating negative feedback to allow for a wide range of transconductance with wide operational bandwidth. High transconductance can provide operation for high-resistance resonators and or resonators that have significant activity dips [1]. This design is resistant to parasitic oscillations seen with high transconductance sustaining amplifiers. An equation and model describing the circuit transconductance is derived and accurately determines this circuit gain using a small number of circuit parameters. Given a desired transconductance, this new amplifier operates with lower power and higher output impedance than an equivalent single inverter. Engineers at Sandia National Laboratories have fabricated and implemented this type of design with approximately 20 mS of transconductance at frequencies of 50 MHz and has been applied to frequencies up to 100 MHz.

More Details
9 Results
9 Results