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Characterization of oxynitride dielectric films grown in NO/O{sub 2} mixtures by rapid thermal oxynitridation

Everist, Sarah C.; Meisenheimer, Timothy L.; Smith, Paul M.

Ultra-thin oxynitride films were grown on Si by direct rapid thermal processing (RTP) oxynitridation in NO/O{sub 2} ambients with NO concentrations from 5% to 50%. During oxynitridation, nitrogen accumulated at the Si/dielectric interface and the average concentration of in N through the resulting films ranged from 0.3 to 3.0 atomic percent. The average concentration of N in the films increased with increasing NO in the ambient gas, but decreased with longer RTP times. The maximum N concentration remained relatively constant for all RTP times and a given NO/O{sub 2} ambient. Re-oxidation following oxynitridation altered L the N profile and improved the electrical characteristics, with an optimal NO/O{sub 2} mixture in the range of 10% to 25% NO. Re-oxidation by RTP improves the electrical characteristics with respect to the films that were not re-oxidized and produces only slight changes in the N distribution or maximum concentration. The electrical results also indicate that oxynitride films are superior to comparably grown oxide films.

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Comparison of electrical CD measurements and cross-section lattice-plane counts of sub-micrometer features replicated in Silicon-on-Insulator materials

Headley, Thomas J.; Everist, Sarah C.; Everist, Sarah C.

Electrical test structures of the type known as cross-bridge resistors have been patterned in (100) epitaxial silicon material that was grown on Bonded and Etched-Back Silicon-on-Insulator (BESOI) substrates. The CDs (Critical Dimensions) of a selection of their reference segments have been measured electrically, by SEM (Scanning-Electron Microscopy) cross-section imaging, and by lattice-plane counting. The lattice-plane counting is performed on phase-contrast images made by High-Resolution Transmission-Electron Microscopy (HRTEM). The reference-segment features were aligned with <110> directions in the BESOI surface material. They were defined by a silicon micromachining process which results in their sidewalls being atomically-planar and smooth and inclined at 54.737{degree} to the surface (100) plane of the substrate. This (100) implementation may usefully complement the attributes of the previously-reported vertical-sidewall one for selected reference-material applications. The SEM, HRTEM, and electrical CD (ECD) linewidth measurements that are made on BESOI features of various drawn dimensions on the same substrate is being investigated to determine the feasibility of a CD traceability path that combines the low cost, robustness, and repeatability of the ECD technique and the absolute measurement of the HRTEM lattice-plane counting technique. Other novel aspects of the (100) SOI implementation that are reported here are the ECD test-structure architecture and the making of HRTEM lattice-plane counts from both cross-sectional, as well as top-down, imaging of the reference features. This paper describes the design details and the fabrication of the cross-bridge resistor test structure. The long-term goal is to develop a technique for the determination of the absolute dimensions of the trapezoidal cross-sections of the cross-bridge resistors reference segments, as a prelude to making them available for dimensional reference applications.

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Characterization of electrical linewidth test structures patterned in (100) Silicon-on-Insulator for use as CD standards

Shea, Patrick J.; Everist, Sarah C.; Everist, Sarah C.

This paper describes the fabrication and measurement of the linewidths of the reference segments of cross-bridge resistors patterned in (100) Bonded and Etched Back Silicon-on-Insulator (BESOI) material. The critical dimensions (CD) of the reference segments of a selection of the cross-bridge resistor test structures were measured both electrically and by Scanning-Electron Microscopy (SEM) cross-section imaging. The reference-segment features were aligned with <110> directions in the BESOI surface material and had drawn linewidths ranging from 0.35 to 3.0 {micro}m. They were defined by a silicon micro-machining process which results in their sidewalls being atomically-planar and smooth and inclined at 54.737{degree} to the surface (100) plane of the substrate. This (100) implementation may usefully complement the attributes of the previously-reported vertical-sidewall one for selected reference-material applications. For example, the non-orthogonal intersection of the sidewalls and top-surface planes of the reference-segment features may alleviate difficulties encountered with atomic-force microscope measurements. In such applications it has been reported that it may be difficult to maintain probe-tip control at the sharp 90{degree} outside corner of the sidewalls and the upper surface. A second application is refining to-down image-processing algorithms and checking instrument performance. Novel aspects of the (100) SOI implementation that are reported here include the cross-bridge resistor test-structure architecture and details of its fabrication. The long-term goal is to develop a technique for the determination of the absolute dimensions of the trapezoidal cross-sections of the cross-bridge resistors' reference segments, as a prelude to developing them for dimensional reference applications. This is believed to be the first report of electrical CD measurements made on test structures of the cross-bridge resistor type that have been patterned in (100) SOI material. The electrical CD results are compared with cross-section SEM measurements made on the same features.

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3 Results
3 Results