Publications

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Electromagnetic shielding (EMS) requirements become more demanding as isolation requirements exceed 100dB in advanced S-band transceiver designs. Via-hole fences have served such designs well in low temperature cofired ceramic (LTCC) modules when used in 2-3 rows, depending on requirements. Replacing these vias with slots through the full thickness of a tape layer has been modeled and shown to improve isolation. We expand on a technique for replacing these rows of full tape thickness features (FTTF) with a single row of stacked walls which, by sequential punching, can be continuous, providing a solid Faraday cage board element with leak-free seams. We discuss the material incompatibilities and manufacturing considerations that need to be addressed for such structures and show preliminary implementations. We will compare construction of multilayer and single layer designs.

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Full tape thickness features (FTTF) using conductors, high K and low K dielectrics, sacrificial volume materials, and magnetic materials are useful as both technically and cost-effective approaches to multiple needs in laminate microelectronic and microsystem structures. Lowering resistance in conductor traces of all kinds, raising Q-factors in coils, and enhancing EMI shielding in RF desingns are a few of the modern needs. By filling with suitable dielectric compositions one can deliver embedded capacitors with an appropriate balance between mechanical compatibility and safety factor for fabrication. Similar techniques could be applied to magnetic materials without wasteful manufacturing processes when the magnetic material is a small fraction of the overall circuit area. Finally, to open the technology of unfilled volumes for radio frequency performance as well as microfluidics and mixed cofired material applications, the full tape thickness implementation of sacrificial volume materials is also considered. We discuss implementations of FTTF structures and discuss technical problems and the promise such structures hold for the future.

The development of transmitter and receiver Multichip Module subassemblies implemented in LTCC for an S-band radar application followed an approach that reduces the number of discrete devices and increases reliability. The LTCC MCM incorporates custom GaAs RF integrated circuits in faraday cavities, novel methods of reducing line resistance and enhancing lumped element Q, and a thick film back plane which attaches to a heat sink. The incorporation of PIN diodes on the receiver and a 50W power amplifier on the transmitter required methods for removing heat beyond what thermal vias can accomplish. The die is a high voltage pHEMT GaAs power amplifier RFIC chip that measures 6.5 mm × 8 mm. Although thermal vias are adequate in certain cases, the thermal solution includes heat spreaders and thermally conductive backplates. Processing hierarchy, including gold-tin die attach and various use of polymeric attachment, must allow rework on these prototypical devices. LTCC cavity covers employ metallic coatings on their exterior surfaces. The processing of the LTCC and its effect on the function of the transmitter and receiver circuits is discussed in the poster session.

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