To advance the energy efficiency of general digital computing far beyond the thermodynamic limits that apply to conventional digital circuits will require utilizing the principles of reversible computing. It has been known since the early 1990s that reversible computing based on adiabatic switching is possible in CMOS, although almost all the “adiabatic” CMOS logic families in the literature are not actually fully adiabatic, which limits their achievable energy savings. The first CMOS logic style achieving truly, fully adiabatic operation if leakage was negligible (CRL) was not fully static, which led to practical engineering difficulties in the presence of certain nonidealities. Later, “static” adiabatic logic families were described, but they were not actually fully adiabatic, or fully static, and were much slower. In this paper, we describe a new logic family, Static 2-Level Adiabatic Logic (S2LAL), which is, to our knowledge, the first CMOS logic family that is both fully static, and truly, fully adiabatic (modulo leakage). In addition, S2LAL is, we think, the fastest possible such family (among fully pipelined sequential circuits), having a latency per logic stage of one tick (transition time), and a minimum clock period (initiation interval) of 8 ticks. S2LAL requires 8 phases of a trapezoidal power-clock waveform (plus constant power and ground references) to be supplied. We argue that, if implemented in a suitable fabrication process designed to aggressively minimize leakage, S2LAL should be capable of demonstrating a greater level of energy efficiency than any other semiconductor-based digital logic family known today.
We report on the measurement results of the superconducting-ferromagnetic transistors (SFTs). The devices were made at Northwestern University and Hypres (SeeQC), Inc. (Nevirkovets et al., 2014; 2015). SFT is a multiterminal device with the SISFIFS (or SFIFSIS) structure (where S, I, and F denote a superconductor, an insulator, and a ferromagnetic material, respectively) exploiting intense quasiparticle injection in order to modify the nonlinear I-V curve of a superconducting tunnel junction. SFT is capable of providing voltage, current, and power amplification while having good input/output isolation. We characterized the devices using different measurement techniques. We measured S parameters of the single- and double-acceptor devices at frequencies up to 5 MHz. Importantly, we confirmed that the isolation between the input and output of the device is quite good. However, the techniques typically employed to characterize semiconductor devices do not allow for revealing the full potential of our low-resistive SFT devices, especially those having two acceptors. In the latter case, we also tested the devices using the battery-powered current sources with floating grounds. Analyzing double-acceptor I-V curves recorded at different levels of injection currents, for an optimal load, we deduced a small-signal voltage gain of 33 and a power gain of 2.4. We suggest that further improvement of the SFT device parameters is possible in optimized devices, so that the device potentially may serve as a preamplifier for readout of output signals of cryogenic detectors and be useful as an element of other superconductor-based circuits. In addition, we used scanning transmission electron microscopy to identify some problems in the fabrication of the devices without any planarization.
Chen, Yizhang; Cogulu, Egecan; Roy, Debangsu; Ding, Jinjun; Mohammadi, Jamileh B.; Kotula, Paul G.; Missert, Nancy A.; Wu, Mingzhong; Kent, Andrew D.
We present a study of the transport properties of thermally generated spin currents in an insulating ferrimagnetic-antiferromagnetic-ferrimagnetic trilayer over a wide range of temperature. Spin currents generated by the spin Seebeck effect (SSE) in a yttrium iron garnet (YIG) YIG/NiO/YIG trilayer on a gadolinium gallium garnet (GGG) substrate were detected using the inverse spin Hall effect (ISHE) in Pt. By studying samples with different NiO thicknesses, the spin diffusion length of NiO was determined to be ∼3.8 nm at room temperature. Surprisingly, a large increase of the SSE signal was observed below 30 K, and the field dependence of the signal closely follows a Brillouin function for an S=7/2 spin. The increase of the SSE signal at low temperatures could thus be associated with the paramagnetic SSE from the GGG substrate. Besides, a broad peak in the SSE response was observed around 100 K. These observations are important in understanding the generation and transport properties of spin currents through magnetic insulators and the role of a paramagnetic substrate in spin current generation.
In a previous paper, we described a new abstract circuit model for reversible computation called asynchronous ballistic reversible computing (ABRC), in which localized information-bearing pulses propagate ballistically along signal paths between stateful abstract devices and elastically scatter off those devices serially, while updating the device state in a logically-reversible and deterministic fashion. The ABRC model has been shown to be capable of universal computation. In the research reported here, we begin exploring how the ABRC model might be realized in practice using single flux quantum solitons (fluxons) in superconducting Josephson junction (JJ) circuits. One natural family of realizations could utilize fluxon polarity to represent binary data in individual pulses propagating near-ballistically, along discrete or continuous long Josephson junctions or microstrip passive transmission lines, and utilize the flux charge (-1, 0, +1) of a JJ-containing superconducting loop with Φ0 < IcL < 2Φ0 to encode a ternary state variable internal to a device. A natural question then arises as to which of the definable abstract ABRC device functionalities using this data representation might be implementable using a JJ circuit that dissipates only a small fraction of the input fluxon energy. We discuss conservation rules and symmetries considered as constraints to be obeyed in these circuits, and begin the process of classifying the possible ABRC devices in this family having up to three bidirectional I/O terminals, and up to three internal states.
We report on the fabrication and characterization of Nb/Ta-N/Nb Josephson junctions grown by room temperature magnetron sputtering on 150-mm diameter Si wafers. Junction characteristics depend upon the Ta-N barrier composition, which was varied by adjusting the N2 flow during film deposition. Higher N2 flow rates raise the barrier resistance and increase the junction critical current. This work demonstrates the viability of Ta-N as an alternative barrier to aluminum oxide, with the potential for large scale integration.
The ability to localize defects in order to understand failure mechanisms in complex superconducting electronics circuits, while operating at low temperature, does not yet exist. This work applies thermally-induced voltage alteration (TIVA), to a biased superconducting electronics (SCE) circuit at ambient temperature. TIVA is a commonly used, laser-based failure analysis technique developed for silicon-based microelectronics. The non-operational circuit consisted of an arithmetic logic unit (ALU) in a high-frequency test bed designed at HYPRES and fabricated by MIT Lincoln Laboratory using their SFQ5ee process. Localized TIVA signals were correlated with reflected light images at the surface, and these sites were further investigated by scanning electron microscopy imaging of focused ion-beam cross-sections. The areas investigated, where prominent TIVA signals were observed, showed seams in the Nb wiring layers at contacts to Josephson junctions or inductors and/or disrupted junction morphologies. These results suggest that the TIVA technique can be used at ambient temperature to diagnose fabrication defects that may cause low temperature circuit failure.
We measure the frequency dependence of a niobium microstrip resonator as a function of temperature from 1.4 to 8.4 K. In a 2-micrometer-wide half-wave resonator, we find the frequency of resonance changes by a factor of 7 over this temperature range. From the resonant frequencies, we extract inductance per unit length, characteristic impedance, and propagation velocity (group velocity). We discuss how these results relate to superconducting electronics. Over the 2 K to 6 K temperature range where superconducting electronic circuits operate, inductance shows a 19% change and both impedance and propagation velocity show an 11% change.
In an ongoing project at Sandia National Laboratories, we are attempting to develop a novel style of superconducting digital processing, based on a new model of reversible computation called Asynchronous Ballistic Reversible Computing (ABRC). We envision an approach in which polarized flux-ons scatter elastically from near-lossless functional components, reversibly updating the local digital state of the circuit, while dissipating only a small fraction of the input fluxon energy. This approach to superconducting digital computation is sufficiently unconventional that an appropriate methodology for hand-design of such circuits is not immediately obvious. To gain insight into the design principles that are applicable in this new domain, we are creating a software tool to automatically enumerate possible topologies of reactive, undamped Josephson junction circuits, and sweep the parameter space of each circuit searching for designs exhibiting desired dynamical behaviors. But first, we identified by hand a circuit implementing the simplest possible nontrivial ABRC functional behavior with bits encoded as conserved polarized fluxons, namely, a one-bit reversible memory cell with one bidirectional I/O port. We expect the tool to be useful for designing more complex circuits.