Publications

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The rapidly increasing use of electronics in high-radiation environments and the continued evolution in transistor architectures and materials demand improved methods to characterize the potential damaging effects of radiation on device performance. Here, electron-beam-induced current is used to map hot-carrier transport in model metal-oxide semiconductor field-effect transistors irradiated with a 300 KeV focused He+ beam as a localized line spanning across the gate and bulk Si. By correlating the damage to the electronic properties and combining these results with simulations, the contribution of spatially localized radiation damage on the device characteristics is obtained. This identified damage, caused by the He+ beam, is attributed to localized interfacial Pb centers and delocalized positive fixed-charges, as surmised from simulations. Comprehension of the long-term interaction and mobility of radiation-induced damage are key for future design of rad-hard devices.

Integration-technology feature shrink increases computing-system susceptibility to single-event effects (SEE). While modeling SEE faults will be critical, an integrated processor's scope makes physically correct modeling computationally intractable. Without useful models, presilicon evaluation of fault-tolerance approaches becomes impossible. To incorporate accurate transistor-level effects at a system scope, we present a multiscale simulation framework. Charge collection at the 1) device level determines 2) circuit-level transient duration and state-upset likelihood. Circuit effects, in turn, impact 3) register-transfer-level architecture-state corruption visible at 4) the system level. Thus, the physically accurate effects of SEEs in large-scale systems, executed on a high-performance computing (HPC) simulator, could be used to drive cross-layer radiation hardening by design. We demonstrate the capabilities of this model with two case studies. First, we determine a D flip-flop's sensitivity at the transistor level on 14-nm FinFet technology, validating the model against published cross sections. Second, we track and estimate faults in a microprocessor without interlocked pipelined stages (MIPS) processor for Adams 90% worst case environment in an isotropic space environment.

Bulk 14-nm FinFET technology was irradiated in a heavy-ion environment (42-MeV Si ions) to study the possibility of displacement damage (DD) in scaled technology devices, resulting in drive current degradation with increased cumulative fluence. These devices were also exposed to an electron beam, proton beam, and cobalt-60 source (gamma radiation) to further elucidate the physics of the device response. Annealing measurements show minimal to no 'rebound' in the ON-state current back to its initial high value; however, the OFF-state current 'rebound' was significant for gamma radiation environments. Low-temperature experiments of the heavy-ion-irradiated devices reveal increased defect concentration as the result for mobility degradation with increased fluence. Furthermore, the subthreshold slope (SS) temperature dependence uncovers a possible mechanism of increased defect bulk traps contributing to tunneling at low temperatures. Simulation work in Silvaco technology computer-aided design (TCAD) suggests that the increased OFF-state current is a total ionizing dose (TID) effect due to oxide traps in the shallow trench isolation (STI). The significant SS elongation and ON-state current degradation could only be produced when bulk traps in the channel were added. Heavy-ion irradiation on bulk 14-nm FinFETs was found to be a combination of TID and DD effects.

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The effect of a linear accelerator's (LINAC's) microstructure (i.e., train of narrow pulses) on devices and the associated transient photocurrent models are investigated. The data indicate that the photocurrent response of Si-based RF bipolar junction transistors and RF p-i-n diodes is considerably higher when taking into account the microstructure effects. Similarly, the response of diamond, SiO2, and GaAs photoconductive detectors (standard radiation diagnostics) is higher when taking into account the microstructure. This has obvious hardness assurance implications when assessing the transient response of devices because the measured photocurrent and dose rate levels could be underestimated if microstructure effects are not captured. Indeed, the rate the energy is deposited in a material during the microstructure peaks is much higher than the filtered rate which is traditionally measured. In addition, photocurrent models developed with filtered LINAC data may be inherently inaccurate if a device is able to respond to the microstructure.

The effects of radiation-induced defects and statistical variation in the dose and energy of MOSFET channel implants in a modern bulk CMOS technology are modeled using a process simulator in combination with analytical computations. The model integrates doping profiles obtained from process simulations and experimentally determined defect potentials into implicit surface potential equations. Solutions to these equations are used to model radiation-induced edge leakage currents in n-channel MOSFETs. The results indicate that slight variations in the channel implant parameters can have a significant impact on the doping profile along the STI sidewall and thus the radiation-induced edge leakage currents.

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The effects of radiation-induced defects and statistical variation in the dose and energy of MOSFET channel implants in a modern bulk CMOS technology are modeled using a process simulator in combination with analytical computations. The model integrates doping profiles obtained from process simulations and experimentally determined defect potentials into implicit surface potential equations. Solutions to these equations are used to model radiation-induced edge leakage currents in 90-nm bulk CMOS n-channel MOSFETs. The results indicate that slight variations in the channel implant parameters can have a significant impact on the doping profile along the shallow trench isolation sidewall and thus the radiation-induced edge leakage currents.

The effects of temperature on the total ionizing dose (TID) response of tantalum oxide (TaOx) memristive bit cells are investigated. The TaOx devices were manufactured by Sandia National Laboratories (SNL). In-situ data were obtained as a function of temperature, accumulated dose, and bias at the Gamma Irradiation Facility (GIF). The data indicate that devices reset into the high resistance off-state exhibit decreases in resistance when the temperature is increased. However, an increased susceptibility to TID at elevated temperatures was not observed.

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In this paper, we provide an overview of the current knowledge of radiation effects in anion-based memristive devices. We will specifically look at the impact of high dose rate ionizing radiation, total ionizing dose (TID), and heavy ions on the electrical characteristics of tantalum oxide (TaOx), titanium dioxide (TiO2), and hafnium oxide (HfOx) memristors. The primary emphasis, however, will be placed on TaOx memristors. While there are several other anion-based memristive devices being fabricated by the semiconductor community for possible use in valence change memories, most of the present radiation work has focused on one of these types of devices. There have also been numerous studies on radiation effects in cation-based chalcogenides such as germanium sulfides and selenides. However, that will not be discussed in this paper.

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