Publications

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Surging interest in engineering quantum computers has stimulated significant and focused research on technologies needed to make them manufacturable and scalable. In the ion trap realm this has led to a transition from bulk three-dimensional macro-scale traps to chip-based ion traps and included important demonstrations of passive and active electronics, waveguides, detectors, and other integrated components. At the same time as these technologies are being developed the system sizes are demanding more ions to run noisy intermediate scale quantum (NISQ) algorithms, growing from around ten ions today to potentially a hundred or more in the near future. To realize the size and features needed for this growth, the geometric and material design space of microfabricated ion traps must expand. In this paper we describe present limitations and the approaches needed to overcome them, including how geometric complexity drives the number of metal levels, why routing congestion affects the size and location of shunting capacitors, and how RF power dissipation can limit the size of the trap array. We also give recommendations for future research needed to accommodate the demands of NISQ scale ion traps that are integrated with additional technologies.

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Atomic clocks are precision timekeeping devices that form the basis for modern communication and navigation. While many atomic clocks are room-sized systems requiring bulky free space optics and detectors, the Trapped-lon Clock using Technology-On-Chip (TICTOC) project integrates these components into Sandia's existing surface trap technology via waveguides for beam delivery and avalanche photodiodes for light detection. Taking advantage of a multi-ensemble clock interrogation approach, we expect to achieve record time stability (< 1 ns error per year) in a compact (< /1 2 L) clock. Here, we present progress on the development of the integrated devices and recent trapped ion demonstrations.

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A methanesulfonic acid (MSA) electrolyte with a single suppressor additive was used for potentiostatic bottom-up filling of copper in mesoscale through silicon vias (TSVs). Conversly, galvanostatic deposition is desirable for production level full wafer plating tools as they are typically not equipped with reference electrodes which are required for potentiostatic plating. Potentiostatic deposition was used to determine the over-potential required for bottom-up TSV filling and the resultant current was measured to establish a range of current densities to investigate for galvanostatic deposition. Galvanostatic plating conditions were then optimized to achieve void-free bottom-up filling in mesoscale TSVs for a range of sample sizes.

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Trapped atomic ions are a leading physical system for quantum information processing. However, scalability and operational fidelity remain limiting technical issues often associated with optical qubit control. One promising approach is to develop on-chip microwave electronic control of ion qubits based on the atomic hyperfine interaction. This project developed expertise and capabilities at Sandia toward on-chip electronic qubit control in a scalable architecture. The project developed a foundation of laboratory capabilities, including trapping the ¹⁷¹Yb⁺ hyperfine ion qubit and developing an experimental microwave coherent control capability. Additionally, the project investigated the integration of microwave device elements with surface ion traps utilizing Sandia’s state-of-the-art MEMS microfabrication processing. This effort culminated in a device design for a multi-purpose ion trap experimental platform for investigating on-chip microwave qubit control, laying the groundwork for further funded R&D to develop on-chip microwave qubit control in an architecture that is suitable to engineering development.

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A design concept, device layout, and monolithic microfabrication processing sequence have been developed for a dual-metal layer atom chip for next-generation positional control of ultracold ensembles of trapped atoms. Atom chips are intriguing systems for precision metrology and quantum information that use ultracold atoms on microfabricated chips. Using magnetic fields generated by current carrying wires, atoms are confined via the Zeeman effect and controllably positioned near optical resonators. Current state-of-the-art atom chips are single-layer or hybrid-integrated multilayer devices with limited flexibility and repeatability. An attractive feature of multi-level metallization is the ability to construct more complicated conductor patterns and thereby realize the complex magnetic potentials necessary for the more precise spatial and temporal control of atoms that is required. Here, we have designed a true, monolithically integrated, planarized, multi-metal-layer atom chip for demonstrating crossed-wire conductor patterns that trap and controllably transport atoms across the chip surface to targets of interest.

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We will present results of the design, operation, and performance of surface ion micro-traps fabricated at Sandia. Recent progress in the testing of the micro-traps will be highlighted, including successful motional control of ions and the validation of simulations with experiments.

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In this late-start Tier I Seniors Council sponsored LDRD, we have designed, simulated, microfabricated, packaged, and tested ion traps to extend the current quantum simulation capabilities of macro-ion traps to tens of ions in one and two dimensions in monolithically microfabricated micrometer-scaled MEMS-based ion traps. Such traps are being microfabricated and packaged at Sandia's MESA facility in a unique tungsten MEMS process that has already made arrays of millions of micron-sized cylindrical ion traps for mass spectroscopy applications. We define and discuss the motivation for quantum simulation using the trapping of ions, show the results of efforts in designing, simulating, and microfabricating W based MEMS ion traps at Sandia's MESA facility, and describe is some detail our development of a custom based ion trap chip packaging technology that enables the implementation of these devices in quantum physics experiments.

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The design, simulation, fabrication, packaging, electrical characterization and testing analysis of a microfabricated a cylindrical ion trap ({mu}CIT) array is presented. Several versions of microfabricated cylindrical ion traps were designed and fabricated. The final design of the individual trap array element consisted of two end cap electrodes, one ring electrode, and a detector plate, fabricated in seven tungsten metal layers by molding tungsten around silicon dioxide (SiO{sub 2}) features. Each layer of tungsten is then polished back in damascene fashion. The SiO{sub 2} was removed using a standard release processes to realize a free-hung structure. Five different sized traps were fabricated with inner radii of 1, 1.5, 2, 5 and 10 {micro}m and heights ranging from 3-24 {micro}m. Simulations examined the effects of ion and neutral temperature, the pressure and nature of cooling gas, ion mass, trap voltage and frequency, space-charge, fabrication defects, and other parameters on the ability of micrometer-sized traps to store ions. The electrical characteristics of the ion trap arrays were determined. The capacitance was 2-500 pF for the various sized traps and arrays. The resistance was in the order of 1-2 {Omega}. The inductance of the arrays was calculated to be 10-1500 pH, depending on the trap and array sizes. The ion traps' field emission characteristics were assessed. It was determined that the traps could be operated up to 125 V while maintaining field emission currents below 1 x 10{sup -15} A. The testing focused on using the 5-{micro}m CITs to trap toluene (C{sub 7}H{sub 8}). Ion ejection from the traps was induced by termination of the RF voltage applied to the ring electrode and current measured on the collector electrode suggested trapping of ions in 1-10% of the traps. Improvements to the to the design of the traps were defined to minimize voltage drop to the substrate, thereby increasing trapping voltage applied to the ring electrode, and to allow for electron injection into, ion ejection from, and optical access to the trapping region.

This work describes the design, computational prototyping, fabrication, and characterization of a microfabricated thermal conductivity detector ({mu}TCD) to analyze the effluent from a micro-gas chromatograph column ({mu}GC) and to complement the detection efficacy of a surface acoustic wave detector in the micro-ChemLab{trademark} system. To maximize the detection sensitivity, we designed a four-filament Wheatstone bridge circuit where the resistors are suspended by a thin silicon nitride membrane in pyramidal or trapezoidal shaped flow cells. The geometry optimization was carried out by simulation of the heat transfer in the devices, utilizing a boundary element algorithm. Within microfabrication constraints, we determined and fabricated nine sensitivity-optimized geometries of the {mu}TCD. The nine optimal geometries were tested with two different flow patterns. We demonstrated that the perpendicular flow, where the gas directly impinged upon the membrane, yielded a sensitivity that is three times greater than the parallel flow, where the gas passed over the membrane. The functionality of the {mu}TCD was validated with the theoretical prediction and showed a consistent linear response to effluent concentrations, with a detection sensitivity of 1 ppm, utilizing less than 1 W of power.

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