It is shown that final chip passivation layers can have a significant impact on total dose hardness. A number of final chip passivation layers are evaluated to identify films that mitigate enhanced low-dose-rate sensitivity (ELDRS) in National Semiconductor Corporation's linear bipolar technologies. It is shown that devices fabricated with either a low temperature oxide or a tetraethyl ortho silicate passivation do not exhibit significant ELDRS effects up to 100 krad(SiO{sub 2}). Passivation studies on CMOS SRAMs suggest that it is unlikely that the passivation layers (or processing tools) are acting as a new source of hydrogen, which could drift or diffuse into the oxide and increase ELDRS sensitivity. Instead, it is possible that the passivation layers affect the mechanical stress in the oxide, which may affect oxide trap properties and possibly the release and mobility of hydrogen. Correlations between mechanical stress induced by the passivation layers and radiation degradation are discussed.
Large differences in charge buildup in SOI buried oxides can result between x-ray and Co-60 irradiations. The effects of bias configuration and substrate type on charge buildup and hardness assurance issues are explored.
Thermal-stress effects are shown to have a significant impact on the enhanced low-dose-rate sensitivity of linear bipolar circuits. Implications of these results on hardness assurance testing and mechanisms are discussed.
Electrical breakdown in thin oxides is assessed by a new bias-temperature ramp technique. No significant effect of radiation exposure on breakdown is observed for high quality thermal and nitrided oxides, up to 20 Mrad(SiO{sub 2}).