Floating substrate passive voltage contrast (FSPVC)
Abstract not provided.
Abstract not provided.
IEEE Transactions on Nuclear Science
Eliminating radiation-induced parasitic leakage paths in integrated circuits (ICs) is key to improving their total dose hardness. Semiconductor manufacturers can use a combination of design and/or process techniques to eliminate known radiation-induced parasitic leakage paths. However, unknown or critical radiation-induced parasitic leakage may still exist on fully processed ICs and it is extremely difficult (if not impossible) to identify these leakage paths based on radiation induced parametric degradation. We show that light emission microscopy can be used to identify the location of radiation-induced parasitic leakage paths in ICs. This is illustrated by using light emission microscopy to find radiation-induced parasitic leakage paths in partially-depleted silicon on insulator static random-access memories (SRAMs). Once leakage paths were identified, modifications were made to the SRAM design to improve the total dose radiation hardness of the SRAMs. Light emission microscopy should prove to be an important tool for the development of future radiation hardened technologies and devices.
Abstract not provided.
Proceedings of SPIE - The International Society for Optical Engineering
Electrostatic discharge (ESD) and electrical overstress (EOS) damage of Micro-Electro-Mechanical Systems (MEMS) has been identified as a new failure mode. This failure mode has not been previously recognized or addressed primarily due to the mechanical nature and functionality of these systems, as well as the physical failure signature that resembles stiction. Because many MEMS devices function by electrostatic actuation, the possibility of these devices not only being susceptible to ESD or EOS damage but also having a high probability of suffering catastrophic failure due to ESD or EOS is very real. Results from previous experiments have shown stationary comb fingers adhered to the ground plane on MEMS devices tested in shock, vibration, and benign environments. Using Sandia polysilicon microengines, we have conducted tests to establish and explain the ESD/EOS failure mechanism of MEMS devices. These devices were electronically and optically inspected prior to and after ESD and EOS testing. This paper will address the issues surrounding MEMS susceptibility to ESD and EOS damage as well as describe the experimental method and results found from ESD and EOS testing. The tests were conducted using conventional IC failure analysis and reliability assessment characterization tools. In this paper we will also present a thermal model to accurately depict the heat exchange between an electrostatic comb finger and the ground plane during an ESD event.
Commercial focused ion beam (FIB) systems are commonly used to image integrated circuits (ICS) after device processing, especially in failure analysis applications. FIB systems are also often employed to repair faults in metal lines for otherwise functioning ICS, and are being evaluated for applications in film deposition and nanofabrication. A problem that is often seen in FIB imaging and repair is that ICS can be damaged during the exposure process. This can result in degraded response or out-right circuit failure. Because FIB processes typically require the surface of an IC to be exposed to an intense beam of 30--50 keV Ga{sup +} ions, both charging and secondary radiation damage are potential concerns. In previous studies, both types of effects have been suggested as possible causes of device degradation, depending on the type of device examined and/or the bias conditions. Understanding the causes of this damage is important for ICS that are imaged or repaired by a FIB between manufacture and operation, since the performance and reliability of a given IC is otherwise at risk in subsequent system application. In this summary, the authors discuss the relative roles of radiation damage and charging effects during FIB imaging. Data from exposures of packaged parts under controlled bias indicate the possibility for secondary radiation damage during FIB exposure. On the other hand, FIB exposure of unbiased wafers (a more common application) typically results in damage caused by high-voltage stress or electrostatic discharge. Implications for FIB exposure and subsequent IC use are discussed.