Publications

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The defect detection capabilities of Power Spectrum Analysis (PSA) [1] have been successfully combined with local laser heating to isolate defective circuitry in a high-speed Si Phase Locked Loop (PLL). The defective operation resulted in missed counts when operating at multi-GHz speeds and elevated temperatures. By monitoring PSA signals at a specific frequency through zero-spanning and scanning the suspect device with a heating laser (1340 nm wavelength), the area(s) causing failure were localized. PSA circumvents the need for a rapid pass/fail detector like that used for Soft Defect Localization (SDL) [2] or Laser-Assisted Defect Analysis (LADA) [3] and converts the at-speed failure to a DC signature. The experimental setup for image acquisition and examples demonstrating utility are described.

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This project investigated a recently patented Sandia technology known as visible light Laser Voltage Probing (LVP). In this effort we carefully prepared well understood and characterized samples for testing. These samples were then operated across a range of configurations to minimize the possibility of superposition of multiple photon carrier interactions as data was taken with conventional and visible light LVP systems. Data consisted of LVP waveforms and Laser Voltage Images (LVI). Visible light (633 nm) LVP data was compared against 1319 nm and 1064 nm conventional LVP data to better understand the similarities and differences in mechanisms for all wavelengths of light investigated. The full text can be obtained by reaching the project manager, Ed Cole or the Cyber IA lead, Justin Ford.

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Manufacturing of integrated circuits (ICs) using a split foundry process expands design space in IC fabrication by employing unique capabilities of multiple foundries and provides added security for IC designers [1] Defect localization and root cause analysis is critical to failure identification and implementation of corrective actions. In addition to split-foundry fabrication, the device addressed in this publication is .comprised of 8 metal layers, aluminum test pads, and tungsten thru-silicon vias (TSVs) making the circuit area > 68% metal. This manuscript addresses the failure analysis efforts involved in root cause analysis, failure analysis findings, and the corrective actions implemented to eliminate these failure mechanisms from occurring in future product.

We present a new, non-destructive electrical technique, Power Spectrum Analysis (PSA). PSA as described here uses off-normal biasing, an unconventional way of powering microelectronics devices. PSA with off-normal biasing can be used to detect subtle differences between microelectronic devices. These differences, in many cases, cannot be detected by conventional electrical testing. In this paper, we highlight PSA applications related to aging and counterfeit detection.

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The microelectronics industry seeks screening tools that can be used to verify the origin of and track integrated circuits (ICs) throughout their lifecycle. Embedded circuits that measure process variation of an IC are well known. This paper adds to previous work using these circuits for studying manufacturer characteristics on final product ICs, particularly for the purpose of developing and verifying a signature for a microelectronics manufacturing facility (fab). We present the design, measurements and analysis of 159 silicon ICs which were built as a proof of concept for this purpose. 80 copies of our proof of concept IC were built at one fab, and 80 more copies were built across two lots at a second fab. Using these ICs, our prototype circuits allowed us to distinguish these two fabs with up to 98.7% accuracy and also distinguish the two lots from the second fab with up to 98.8% accuracy.

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Laser-based failure analysis techniques demonstrate the ability to quickly and non-intrusively screen deep ultraviolet light-emitting diodes (LEDs) for electrically-active defects. In particular, two laser-based techniques, light-induced voltage alteration and thermally-induced voltage alteration, generate applied voltage maps (AVMs) that provide information on electrically-active defect behavior including turn-on bias, density, and spatial location. Here, multiple commercial LEDs were examined and found to have dark defect signals in the AVM indicating a site of reduced resistance or leakage through the diode. The existence of the dark defect signals in the AVM correlates strongly with an increased forward-bias leakage current. This increased leakage is not present in devices without AVM signals. Transmission electron microscopy analysis of a dark defect signal site revealed a dislocation cluster through the pn junction. The cluster included an open core dislocation. Even though LEDs with few dark AVM defect signals did not correlate strongly with power loss, direct association between increased open core dislocation densities and reduced LED device performance has been presented elsewhere [M. W. Moseley et al., J. Appl. Phys. 117, 095301 (2015)].

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Microsystems-enabled photovoltaics (MEPV) can potentially meet increasing demands for light-weight, portable, photovoltaic solutions with high power density and efficiency. The study in this report examines failure analysis techniques to perform defect localization and evaluate MEPV modules. CMOS failure analysis techniques, including electroluminescence, light-induced voltage alteration, thermally-induced voltage alteration, optical beam induced current, and Seabeck effect imaging were successfully adapted to characterize MEPV modules. The relative advantages of each approach are reported. In addition, the effects of exposure to reverse bias and light stress are explored. MEPV was found to have good resistance to both kinds of stressors. The results form a basis for further development of failure analysis techniques for MEPVs of different materials systems or multijunction MEPVs. The incorporation of additional stress factors could be used to develop a reliability model to generate lifetime predictions for MEPVs as well as uncover opportunities for future design improvements.

Visible light laser voltage probing (LVP) for improved backside optical spatial resolution is demonstrated on ultra-thinned samples. A prototype system for data acquisition, a method to produce ultra-thinned SOI samples, and LVP signal, imaging, and waveform acquisition are described on early and advanced SOI technology nodes. Spatial resolution and signal comparison with conventional, infrared LVP analysis is discussed.

Microsystems-enabled photovoltaics (MEPV) has great potential to meet the increasing demands for light-weight, photovoltaic solutions with high power density and efficiency. This paper describes effective failure analysis techniques to localize and characterize nonfunctional or underperforming MEPV cells. The defect localization methods such as electroluminescence under forward and reverse bias, as well as optical beam induced current using wavelengths above and below the device band gap, are presented. The current results also show that the MEPV has good resilience against degradation caused by reverse bias stresses. © 2013 IEEE.

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We present the results of a two-year early career LDRD that focused on defect localization in deep green and deep ultraviolet (UV) light-emitting diodes (LEDs). We describe the laser-based techniques (TIVA/LIVA) used to localize the defects and interpret data acquired. We also describe a defect screening method based on a quick electrical measurement to determine whether defects should be present in the LEDs. We then describe the stress conditions that caused the devices to fail and how the TIVA/LIVA techniques were used to monitor the defect signals as the devices degraded and failed. We also describe the correlation between the initial defects and final degraded or failed state of the devices. Finally we show characterization results of the devices in the failed conditions and present preliminary theories as to why the devices failed for both the InGaN (green) and AlGaN (UV) LEDs.

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The working of induced voltage alteration (IVA) techniques and its major developments in areas of hardware for analysis, electrical biasing, detection advances, resolution improvements, and future possibilities, is discussed. IVA technique uses either a scanning electron microscope's (SEM) electron beam or a scanning optical microscope's (SOM) laser beam as the external stimulus. The other IVA techniques were developed using different localized stimuli, with the same sensitive biasing approach. The IVA techniques takes advantage of the strong signal response of CMOS devices when operated as current-to-voltage converters. To improve the biasing approach, externally induced voltage alterations (XIVA) was introduced, in which an ac choke circuit acts as a constant-voltage source. Synchronization with device operation also allows specific vectors to be analyzed using local photocurrent and thermal stimulus.

State-of-the-art techniques for failure localization and design modification through bulk silicon are essential for multi-level metallization and new, flip chip packaging methods. The tutorial reviews the transmission of light through silicon, sample preparation, and backside defect localization techniques that are both currently available and under development. The techniques covered include emission microscopy, scanning laser microscope based techniques (electrooptic techniques, LIVA and its derivatives), and other non-IR based tools (FIB, e-beam techniques, etc.).

SEM and SOM techniques for IC analysis that take advantage of 'active injection' are reviewed. Active injection refers to techniques that alter the electrical characteristics of the device analyzed. All of these techniques can be performed on a standard SEM or SOM (using the proper laser wavelengths).

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Optical beam failure analysis methods provide unique capabilities to identify and localize defect types that would be difficult or impossible by other methods. by understanding the physics of signal generation, the user gains the insight necessary to optimize technique performance.

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Electrostatic discharge (ESD) and electrical overstress (EOS) damage of Micro-Electro-Mechanical Systems (MEMS) has been identified as a new failure mode. This failure mode has not been previously recognized or addressed primarily due to the mechanical nature and functionality of these systems, as well as the physical failure signature that resembles stiction. Because many MEMS devices function by electrostatic actuation, the possibility of these devices not only being susceptible to ESD or EOS damage but also having a high probability of suffering catastrophic failure due to ESD or EOS is very real. Results from previous experiments have shown stationary comb fingers adhered to the ground plane on MEMS devices tested in shock, vibration, and benign environments. Using Sandia polysilicon microengines, we have conducted tests to establish and explain the ESD/EOS failure mechanism of MEMS devices. These devices were electronically and optically inspected prior to and after ESD and EOS testing. This paper will address the issues surrounding MEMS susceptibility to ESD and EOS damage as well as describe the experimental method and results found from ESD and EOS testing. The tests were conducted using conventional IC failure analysis and reliability assessment characterization tools. In this paper we will also present a thermal model to accurately depict the heat exchange between an electrostatic comb finger and the ground plane during an ESD event.

Electrical shorting in micro-electro-mechanical systems (MEMS) is a significant production and manufacturing concern. We present a new approach to localizing shorted MEMS devices using Thermally-Induced Voltage Alteration (TIVA) [1]. In TIVA, the shorted, thermally isolated MEMS device is very sensitive to thermal stimulus. The site of the MEMS short will respond as a thermocouple when heated. By monitoring the potential across the shorted MEMS device as a laser scans across the sample, an image showing the location of the thermocouple (short site) can be generated. The TIVA signal for thermally isolated MEMS devices is much higher than that observed for conventional IC interconnections. This results from the larger temperature gradients generated during laser scanning due to little or no substrate heat sinking. The capability to quickly localize shorted MEMS structures is demonstrated by several examples. Thermal modeling of heat distributions is presented and is consistent with the experimental results.

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Two new failure analysis techniques have been developed for backside and front side localization of open and shorted interconnections on ICs. These scanning optical microscopy techniques take advantage of the interactions between IC defects and localized heating using a focused infrared laser ({lambda} = 1,340 nm). Images are produced by monitoring the voltage changes across a constant current supply used to power the IC as the laser beam is scanned across the sample. The methods utilize the Seebeck Effect to localize open interconnections and Thermally-Induced Voltage Alteration (TIVA) to detect shorts. Initial investigations demonstrated the feasibility of TIVA and Seebeck Effect Imaging (SEI). Subsequent improvements have greatly increased the sensitivity of the TIVA/SEI system, reducing the acquisition times by more than 20X and localizing previously unobserved defects. The interaction physics describing the signal generation process and several examples demonstrating the localization of opens and shorts are described. Operational guidelines and limitations are also discussed. The system improvements, non-linear response of IC defects to heating, modeling of laser heating and examples using the improved system for failure analysis are presented.