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MOS devices are susceptible to damage by ionizing radiation due to charge buildup in gate, field and SOI buried oxides. Under positive bias holes created in the gate oxide will transport to the Si / SiO{sub 2} interface creating oxide-trapped charge. As a result of hole transport and trapping, hydrogen is liberated in the oxide which can create interface-trapped charge. The trapped charge will affect the threshold voltage and degrade the channel mobility. Neutralization of oxidetrapped charge by electron tunneling from the silicon and by thermal emission can take place over long periods of time. Neutralization of interface-trapped charge is not observed at room temperature. Analytical models are developed that account for the principal effects of total dose in MOS devices under different gate bias. The intent is to obtain closed-form solutions that can be used in circuit simulation. Expressions are derived for the aging effects of very low dose rate radiation over long time periods.

This manual describes the use of theXyceParallel Electronic Simulator.Xycehasbeen designed as a SPICE-compatible, high-performance analog circuit simulator, andhas been written to support the simulation needs of the Sandia National Laboratorieselectrical designers. This development has focused on improving capability over thecurrent state-of-the-art in the following areas:%04Capability to solve extremely large circuit problems by supporting large-scale par-allel computing platforms (up to thousands of processors). Note that this includessupport for most popular parallel and serial computers.%04Improved performance for all numerical kernels (e.g., time integrator, nonlinearand linear solvers) through state-of-the-art algorithms and novel techniques.%04Device models which are specifically tailored to meet Sandia's needs, includingmany radiation-aware devices.3 XyceTMUsers' Guide%04Object-oriented code design and implementation using modern coding practicesthat ensure that theXyceParallel Electronic Simulator will be maintainable andextensible far into the future.Xyceis a parallel code in the most general sense of the phrase - a message passingparallel implementation - which allows it to run efficiently on the widest possible numberof computing platforms. These include serial, shared-memory and distributed-memoryparallel as well as heterogeneous platforms. Careful attention has been paid to thespecific nature of circuit-simulation problems to ensure that optimal parallel efficiencyis achieved as the number of processors grows.The development ofXyceprovides a platform for computational research and de-velopment aimed specifically at the needs of the Laboratory. WithXyce, Sandia hasan %22in-house%22 capability with which both new electrical (e.g., device model develop-ment) and algorithmic (e.g., faster time-integration methods, parallel solver algorithms)research and development can be performed. As a result,Xyceis a unique electricalsimulation capability, designed to meet the unique needs of the laboratory.4 XyceTMUsers' GuideAcknowledgementsThe authors would like to acknowledge the entire Sandia National Laboratories HPEMS(High Performance Electrical Modeling and Simulation) team, including Steve Wix, CarolynBogdan, Regina Schells, Ken Marx, Steve Brandon and Bill Ballard, for their support onthis project. We also appreciate very much the work of Jim Emery, Becky Arnold and MikeWilliamson for the help in reviewing this document.Lastly, a very special thanks to Hue Lai for typesetting this document with LATEX.TrademarksThe information herein is subject to change without notice.Copyrightc 2002-2003 Sandia Corporation. All rights reserved.XyceTMElectronic Simulator andXyceTMtrademarks of Sandia Corporation.Orcad, Orcad Capture, PSpice and Probe are registered trademarks of Cadence DesignSystems, Inc.Silicon Graphics, the Silicon Graphics logo and IRIX are registered trademarks of SiliconGraphics, Inc.Microsoft, Windows and Windows 2000 are registered trademark of Microsoft Corporation.Solaris and UltraSPARC are registered trademarks of Sun Microsystems Corporation.Medici, DaVinci and Taurus are registered trademarks of Synopsys Corporation.HP and Alpha are registered trademarks of Hewlett-Packard company.Amtec and TecPlot are trademarks of Amtec Engineering, Inc.Xyce's expression library is based on that inside Spice 3F5 developed by the EECS De-partment at the University of California.All other trademarks are property of their respective owners.ContactsBug Reportshttp://tvrusso.sandia.gov/bugzillaEmailxyce-support%40sandia.govWorld Wide Webhttp://www.cs.sandia.gov/xyce5 XyceTMUsers' GuideThis page is left intentionally blank6

An analytical capability is being developed that can be used to predict the effect of corrosion on the performance of electrical circuits and systems. The availability of this ''toolset'' will dramatically improve our ability to influence device and circuit design, address and remediate field occurrences, and determine real limits for circuit service life. In pursuit of this objective, we have defined and adopted an iterative, statistical-based, top-down approach that will permit very formidable and real obstacles related to both the development and use of the toolset to be resolved as effectively as possible. An important component of this approach is the direct incorporation of expert opinion. Some of the complicating factors to be addressed involve the code/model complexity, the existence of large number of possible degradation processes, and an incompatibility between the length scales associated with device dimensions and the corrosion processes. Two of the key aspects of the desired predictive toolset are (1) a direct linkage of an electrical-system performance model with mechanistic-based, deterministic corrosion models, and (2) the explicit incorporation of a computational framework to quantify the effects of non-deterministic parameters (uncertainty). The selected approach and key elements of the toolset are first described in this paper. These descriptions are followed by some examples of how this toolset development process is being implemented.

The requirements in modeling and simulation are driven by two fundamental changes in the nuclear weapons landscape: (1) The Comprehensive Test Ban Treaty and (2) The Stockpile Life Extension Program which extends weapon lifetimes well beyond their originally anticipated field lifetimes. The move from confidence based on nuclear testing to confidence based on predictive simulation forces a profound change in the performance asked of codes. The scope of this document is to improve the confidence in the computational results by demonstration and documentation of the predictive capability of electrical circuit codes and the underlying conceptual, mathematical and numerical models as applied to a specific stockpile driver. This document describes the High Performance Electrical Modeling and Simulation software normal environment Verification and Validation Plan.