Publications

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Compact semiconductor device models are essential for efficiently designing and analyzing large circuits. However, traditional compact model development requires a large amount of manual effort and can span many years. Moreover, inclusion of new physics (e.g., radiation effects) into an existing model is not trivial and may require redevelopment from scratch. Machine Learning (ML) techniques have the potential to automate and significantly speed up the development of compact models. In addition, ML provides a range of modeling options that can be used to develop hierarchies of compact models tailored to specific circuit design stages. In this paper, we explore three such options: (1) table-based interpolation, (2) Generalized Moving Least-Squares, and (3) feedforward Deep Neural Networks, to develop compact models for a p-n junction diode. We evaluate the performance of these "data-driven" compact models by (1) comparing their voltage-current characteristics against laboratory data, and (2) building a bridge rectifier circuit using these devices, predicting the circuit's behavior using SPICE-like circuit simulations, and then comparing these predictions against laboratory measurements of the same circuit.

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Typically, transistors are modeled by the application of calibrated nominal and range models. These models consists of differing parameter values that describe the location and the upper and lower limits of a distribution of some transistor characteristic such as current capacity. Correspond- ingly, when using this approach, high degrees of accuracy of the transistor models are not expected since the set of models is a surrogate for a statistical description of the devices. The use of these types of models describes expected performances considering the extremes of process or transistor deviations. In contrast, circuits that have very stringent accuracy requirements require modeling techniques with higher accuracy. Since these accurate models have low error in transistor descriptions, these models can be used to describe part to part variations as well as an accurate description of a single circuit instance. Thus, models that meet these stipulations also enable the calculation of quantifi- cation of margins with respect to a functional threshold and uncertainties in these margins. Given this need, new model high accuracy calibration techniques for bipolar junction transis- tors have been developed and are described in this report.

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The objective of this work was to understand the fundamental physics of extremely high frequency RF effects on electronics. To accomplish this objective, we produced models, conducted simulations, and performed measurements to identify the mechanisms of effects as frequency increases into the millimeter-wave regime. Our purpose was to answer the questions, 'What are the tradeoffs between coupling, transmission losses, and device responses as frequency increases?', and, 'How high in frequency do effects on electronic systems continue to occur?' Using full wave electromagnetics codes and a transmission-line/circuit code, we investigated how extremely high-frequency RF propagates on wires and printed circuit board traces. We investigated both field-to-wire coupling and direct illumination of printed circuit boards to determine the significant mechanisms for inducing currents at device terminals. We measured coupling to wires and attenuation along wires for comparison to the simulations, looking at plane-wave coupling as it launches modes onto single and multiconductor structures. We simulated the response of discrete and integrated circuit semiconductor devices to those high-frequency currents and voltages, using SGFramework, the open-source General-purpose Semiconductor Simulator (gss), and Sandia's Charon semiconductor device physics codes. This report documents our findings.

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Prior to this research, we have developed high-gain GaAs photoconductive semiconductor switches (PCSSs) to trigger 50-300 kV high-voltage switches (HVSs). We have demonstrated that PCSSs can trigger a variety of pulsed-power switches operating at 50300 kV by locating the trigger generator (TG) directly at the HVS. This was demonstrated for two types of dc-charged trigatrons and two types of field distortion midplane switches, including a ±100 kVDC switch produced by the High Current Electronics Institute used in the linear transformer driver. The lowest rms jitter obtained from triggering an HVS with a PCSS was 100 ps from a 300 kV pulse-charged trigatron. PCSSs are the key component in these independently timed fiber-optically controlled low jitter TGs for HVSs. TGs are critical subsystems for reliable and efficient pulsed-power facilities because they control the timing synchronization and amplitude variation of multiple pulse-forming lines that combine to produce the total system output. Future facility-scale pulsed-power systems are even more dependent on triggering, as they are composed of many more triggered HVSs, and they produce shaped pulses by independent timing of the HVSs. As pulsed-power systems become more complex, the complexity of the associated trigger systems also increases. One of the means to reduce this complexity is to allow the trigger system to be charged directly from the voltage appearing across the HVS. However, for slow or dc-charged pulsed-power systems, this can be particularly challenging as the dc hold-off of the PCSS dramatically declines. This paper presents results that are seeking to address HVS performance requirements over large operating ranges by triggering using a pulsed-charged PCSS-based TG. Switch operating conditions that are as low as 45% of the self-break were achieved. A dc-charged PCSS-based TG is also introduced and demonstrated over a 39-61 kV operating range. DC-charged PCSS allows the TG to be directly charged from slow or dc-charged pulsed-power systems. GaAs and neutron-irradiated GaAs (n-GaAs) PCSSs were used to investigate the dc-charged operation. © 2010 IEEE.