Publications

Single-Event Upset and Snapback in Silicon-on-Insulator Devices and Integrated Circuits

Dodd, Paul E.; Shaneyfelt, Marty R.; Walsh, David S.; Schwank, James R.; Hash, Gerald L.; Jones, Rhonda L.; Draper, Bruce L.; Winokur, Peter S.

The characteristics Of ion-induced charge collection and single-event upset are studied in SOI transistors and circuits with various body tie structures. Impact ionization effects including single-event snapback are shown to be very important. Focused ion microbeam experiments are used to find single-event snapback drain voltage thresholds in n-channel SOI transistors as a function of device width. Three-Dimensional device simulations are used to determine single-event upset and snapback thresholds in SOI SRAMS, and to study design tradeoffs for various body-tie structures. A window of vulnerability to single-event snapback is shown to exist below the single-event upset threshold. The presence of single-event snapback in commercial SOI SRAMS is confirmed through broadbeam ion testing, and implications for hardness assurance testing of SOI integrated circuits are discussed.