Publications
Sensitivity analysis of a technique for the extraction of interface trap density in SiC MOSFETs from subthreshold characteristics
A method for extracting interface trap density (DIT) from subthreshold I-V characteristics is used to analyze data on a SiC MOSFET stressed for thirty minutes at 175°C with a gate bias of-20 V. Without knowing the channel doping, the change in DIT can be calculated when referenced to an energy level correlated with the threshold voltage. © 2014 IEEE.