Publications

Impacts of Substrate Thinning on FPGA Performance and Reliability [Slides]

Leonhardt, Darin L.; Cannon, Matthew J.; Dodds, Nathaniel A.; Fellows, Matthew W.; Grzybowski, Thomas A.; Haase, Gad S.; Lee, David S.; LeBoeuf, Thomas L.; rice, William r.

Substrate thinning is necessary in devices with flip-chip BGA packages to enable both radiation testing and component qualification and high-spatial resolution beam-based failure analysis methods. We investigated three factors affecting device performance: subsurface damage from the thinning process, reduced heat spreading in thin substrates, and changes in device switching speed. We conclude subsurface damage to crystalline Si caused by the thinning process is removable with sufficient SiO₂ slurry polishing. Local temperature differences increase minimally in devices thinned to 3 μm. Compressive stress in the Si increases globally after device thinning and leads to slowing of ring oscillator frequency by about 0.5% compared to full-thickness devices. Future work will include extending the results to submicron Si thickness values, which also has important benefits for failure analysis, debug, and security assessments. We also plan to extend this type of work to other FPGAs and other devices like memory and processors.