Publications
Dynamic NBTI effects in HfSiON
Negative bias temperature instability is an issue of critical importance as the space electronics industry evolves because it may dominate the reliability lifetime. Understanding its physical origin is therefore essential in determining how best to search for methods of mitigation. It has been suggested that the magnitude of the effect is strongly dependent on circuit operation conditions (static or dynamic modes). In the present work, we examine the time constants related to the charging and recovery of trapped charged induced by NBTI in HfSiON gate dielectric devices. In previous work, we avoided the issue of charge relaxation during acquisition of the I{sub ds}(V{sub gs}) curve by invoking a continuous stressing technique whereby {Delta}V{sub th} was extracted from a series of single point I{sub ds} measurements. This method relied heavily on determination of the initial value of the source-drain current (I{sub ds}{sup o}) prior to application of gate-source stress. In the present work we have used a new pulsed measurement system (Keithley SCS 4200-PIV) which not only removes this uncertainty but also permits dynamic measurements in which devices are AC stressed (Fig. 1a) or subjected to cycles of continued DC stresses followed by relaxation (Fig. 1b). We can now examine the charging and recovery characteristics of NBTI with higher precision than previously possible. We have performed NBTI stress experiments at room temperature on p-channel MOSFETs made with HfSiON gate dielectrics. In all cases the devices were stressed in the linear regime with V{sub ds}=-0.1V. We have defined two separate waveforms/pulse trains as illustrated in Fig 1. These were applied to the gate of the MOSFET. Firstly we examined the charging characteristics by applying an AC stress at 2.5MHz or 10Hz for different times. For a 50% duty cycle this corresponded to V{sub gs} = - 2V pulses for 200ns or 500ms followed by V{sub gs} = 0V pulses for 200ns or 500ms recovery respectively. In between 'bursts' of AC stress cycles, the I{sub ds}(V{sub gs}) characteristic in the range (-0.6V, -1.3V) was measured in 10.2 {micro}s. V{sub th} was extracted directly from this curve, or from a single I{sub ds} point normalized to the initial I{sub ds}{sup o} using our previous method. The resulting I{sub ds}/I{sub ds}{sup o} curves are compared; in Fig 2, the continuous stress results are included. In the second method, we examined the recovery dynamic by holding V{sub gs} = 0V for a finite amount of time (range 100 ns to 100 ms) following stress at V{sub gs} = - 2V for various times. In Fig 3 we compare |{Delta}V{sub th}(t)| results for recovery times of 100ms, 1ms, 100{micro}s, 50{micro}s, 25{micro}s, 10{micro}s, 100ns, and DC (i.e. no recovery) The data in Fig 2 shows that with a high frequency stress (2.5MHz) devices undergo significantly less (but finite) current degradation than devices stressed at 10Hz. This appears to be limited by charging and not by recovery. Fig 3 supports this hypothesis since for 100ns recovery periods, only a small percentage of the trapped charge relaxes. Detailed explanation of these experiments will be presented at the conference.