Publications

Compensating for parasitic voltage drops in resistive memory arrays

Agarwal, Sapan A.; Schiek, Richard S.; Marinella, Matthew J.

Parasitic resistances cause devices in a resistive memory array to experience different read/write voltages depending on the device location, resulting in uneven writes and larger leakage currents. We present a new method to compensate for this by adding extra series resistance to the drivers to equalize the parasitic resistance seen by all the devices. This allows for uniform writes, enabling multi-level cells with greater numbers of distinguishable levels, and reduced write power, enabling larger arrays.